We have performed computer calculations to explore effects of the p/i interface on the open-circuit voltage in a-Si:H based pin solar cells. The principal conclusions are that interface limitation can occur for values of VOC significantly below the built-in potential VBI of a cell, and that the effects can be understood in terms of thermionic emission of electrons from the intrinsic layer into the p-layer. We compare measurements of VOC and electroabsorption estimates of VBI with the model calculations. We conclude that p/i interface limitation is important for current a-Si:H based cells, and that the conduction band offset between the p and i layers is as important as the built-in potential for future improvements to VOC.